Assignment Computer Organization
1.) An instruction is stored at location 300 with its address field at location 301. The address field has the value 400. A processor register R 1 contains the number 200. Evaluate the effective address if the addressing mode of the instruction is (a) direct; (b) immediate; (c) relative; (d) register indirect; (e) index with R1 as the index register.
2.)The two word instruction is stored in memory at an address designated by symbol The address field of the instruction (stored at ) is designated by the symbol . The operand used during the execution of the instruction is stored at address symbolized by . An index register contains the value . State how is calculated from the other addresses if the addressing mode of the instruction is
3.) i)How many 128 × 8 RAM chips are needed to provide a memory capacity of 2048 bytes? ii) How many lines of the address bus must be used to access 2048 byte of memory? How many of these lines will be common to all chips? iii)How many lines must be decoded for chip select? Specify the size of the decoders?
4.) How many 128 × 8 RAM chips are needed to provide a memory capacity of 2048 bytes? How many lines of the address bus must be used to access 2048 byte of memory? How many of these lines will be common to all chips? How many lines must be decoded for chip select? Specify the size of the decoders?
5.)How many 128 × 8 RAM chips are needed to provide a memory capacity of 2048 bytes? How many lines of the address bus must be used to access 2048 byte of memory? How many of these lines will be common to all chips? How many lines must be decoded for chip select? Specify the size of the decoders?